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Intel SoC Design Engineer - Physical Design/Integration in Hillsboro, Oregon

Job Description

Come join Intel's Client Engineering Group, responsible for designing Client SoCs that make up more than half of Intel's annual revenue. We envision the future of computing and design for the next generation of laptops and desktop computers.

We are looking for a SoC (System on Chip) Physical Design Engineer ready to research, design, develop, and test lead Intel designs as we re-imagine how to build SoCs at Intel and in the semiconductor industry. This role is within Intel's highly-regarded Devices Development Group, headquartered in Portland, Oregon with additional sites in Austin, Texas, and Penang, Malaysia.

Our bold purpose as a company is to "create world-changing technology that enriches the lives of every person on earth" and this role is instrumental in furthering our mission to shape the future of technology.

Your responsibilities may include, but not be limited to:

  • SoC Design integration Methodology - Clock design Methodology, Power delivery, RTL2GDS, Performance Verification

  • Provide technical direction to, and collaborate with, platform and business units

  • Drive performance optimization, including co-optimization work with process teams, to create best-in-class designs

  • Physical synthesis, place and Route, and clock tree synthesis with Synopsys or Cadence tools

  • Static timing analysis, constraint understanding, generation, clock stamping, and timing closure

  • Multiple Power Domain analysis using standard Power Formats UPF/CPF

  • Place and Route and clock tree synthesis with Synopsys ICCTI Flows

  • Design signoff and hand off to the Mask Shop

In addition to the qualifications listed below, the ideal candidate will also demonstrate the following traits:

  • Self-motivator with strong problem solving skills.

  • Leadership skills with willingness to mentor junior designers.

  • Interpersonal skills

  • Strong written and verbal communication.

  • Willingness to work with teams across projects, domains, and Geos

  • Willingness to lead and rally teams to address critical design and execution challenges

Qualifications

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Requirements

Candidate must have a Bachelors degree in Electrical/Computer Engineering or related field and 6+ years of industry work experience - OR - a Masters degree in Electrical/Computer Engineering or related field and 4+ years of industry work experience - OR - a PhD in Electrical/Computer Engineering or related field and 2+ years of industry work experience.

8+ years of experience in:

  • Back-end design and/or integration

  • Product development and delivery on leading edge process nodes

  • Leading cross function, cross Geo teams

Preferred Qualifications

10+ years of experience in:

  • Back-end design and/or integration

Inside this Business Group

The Silicon Engineering Group is a worldwide organization focused on the development and integration of SOCs, Cores, and critical IPs that power Intel’s leadership products. This business group leverages an incomparable mix of experts with different backgrounds, cultures, perspectives, and experiences to unleash the most innovative, amazing, and exciting computing experiences.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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